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1 lt1168 low power, single resistor gain programmable, precision instrumentation amplifier the lt ? 1168 is a micropower, precision instrumentation am- plifier that requires only one external resistor to set gains of 1 to 10,000. the low voltage noise of 10nv/ ? hz (at 1khz) is not compromised by low power dissipation (350 m a typical for 15v supplies). the wide supply range of 2.3v to 18v allows the lt1168 to fit into a wide variety of industrial as well as battery-powered applications. the high accuracy of the lt1168 is due to a 20ppm maximum nonlinearity and 0.4% max gain error (g = 10). previous mono- lithic instrumentation amps cannot handle a 2k load resistor whereas the nonlinearity of the lt1168 is specified for loads as low as 2k. the lt1168 is laser trimmed for very low input offset voltage (40 m v max), drift (0.3 m v/ c), high cmrr (90db, g = 1) and psrr (103db, g = 1). low input bias currents of 250pa max are achieved with the use of superbeta process- ing. the output can handle capacitive loads up to 1000pf in any gain configuration while the inputs are esd protected up to 13kv (human body). the lt1168 with two external 5k resistors passes the iec 1000-4-2 level 4 specification. the lt1168 is a pin-for-pin improved second source for the ad620 and ina118. the lt1168, offered in 8-pin pdip and so packages, requires significantly less pc board area than discrete op amp resistor designs. these advantages make the lt1168 the most cost effective solution for precision instrumentation amplifier applications. n supply current: 530 m a max n meets iec 1000-4-2 level 4 ( 15kv) esd tests with two external 5k resistors n single gain set resistor: g = 1 to 10,000 n gain error: g = 10, 0.4% max n input offset voltage drift: 0.3 m v/ c max n gain nonlinearity: g = 10, 20ppm max n input offset voltage: 40 m v max n input bias current: 250pa max n psrr at a v =1: 103db min n cmrr at a v = 1: 90db min n wide supply range: 2.3v to 18v n 1khz voltage noise: 10nv/ ? hz n 0.1hz to 10hz noise: 0.28 m v p-p n available in 8-pin pdip and so packages n bridge amplifiers n strain gauge amplifiers n thermocouple amplifiers n differential to single-ended converters n differential voltage to current converters n data acquisition n battery-powered and portable equipment n medical instrumentation n scales , ltc and lt are registered trademarks of linear technology corporation. single supply* pressure monitor nonlinearity (100ppm/div) g = 1000 output voltage (2v/div) 1168 ta01a r l = 2k v out = 10v gain nonlinearity *see theory of operation section features descriptio u applicatio s u typical applicatio u + 2 3 2 1 1 1 1/2 lt1112 3.5k 5v 3.5k 3.5k 3.5k 8 7 6 1168 ta01 5 40k 20k 40k digital data output 4 r1 g = 200 249 3 ref in agnd adc ltc 1286 bi technologies 67-8-3 r40kq, (0.02% ratio match) + lt1168
2 lt1168 supply voltage ...................................................... 20v differential input voltage (within the supply voltage) ..................................................... 40v input voltage (equal to supply voltage) ................ 20v input current (note 2) ....................................... 20ma output short-circuit duration (note 3) ............ indefinite operating temperature range (note 4) .. C 40 c to 85 c specified temperature range lt1168ac/LT1168C (note 5) ............. C 40 c to 85 c lt1168ai/lt1168i ............................. C 40 c to 85 c storage temperature range ................. C 40 c to 150 c lead temperature (soldering, 10 sec).................. 300 c order part number s8 part marking lt1168acn8 lt1168acs8 lt1168ain8 lt1168ais8 LT1168Cn8 LT1168Cs8 lt1168in8 lt1168is8 1168a 1168ai consult factory for military grade parts. t jmax = 150 c, q ja = 150 c/ w (n8) t jmax = 150 c, q ja = 190 c/ w (s8) t a = 25 c. v s = 15v, v cm = 0v, r l = 10k unless otherwise noted. 1168 1168i (note 1) lt1168ac/lt1168ai LT1168C/lt1168i symbol parameter conditions (note 6) min typ max min typ max units g gain range g = 1 + (49.4k/r g ) 1 10k 1 10k gain error g = 1 0.008 0.02 0.015 0.03 % g = 10 (note 7) 0.04 0.4 0.05 0.5 % g = 100 (note 7) 0.04 0.5 0.05 0.6 % g = 1000 (note 7) 0.08 0.5 0.08 0.6 % gain nonlinearity (notes 7, 8) v o = 10v, g = 1 2 6 3 10 ppm v o = 10v,g = 10 and 100 10 20 15 25 ppm v o = 10v, g = 1000 20 40 25 60 ppm v o = 10v, g = 1, r l = 2k 4 15 5 20 ppm v o = 10v,g = 10 and 100, r l = 2k 20 40 30 60 ppm v o = 10v, g = 1000, r l = 2k 40 75 50 90 ppm v ost total input referred offset voltage v ost = v osi + v oso /g v osi input offset voltage g = 1000, v s = 5v to 15v 15 40 20 60 m v v oso output offset voltage g = 1, v s = 5v to 15v 40 200 50 300 m v i os input offset current 50 300 60 450 pa i b input bias current 40 250 80 500 pa e n input noise voltage, rti 0.1hz to 10hz, g = 1 2.00 2.00 m v p-p 0.1hz to 10hz, g = 1000 0.28 0.28 m v p-p input noise voltage density, rti f o = 1khz 10 15 10 15 nv/ ? hz output noise voltage density, rti f o = 1khz (note 9) 165 220 165 220 nv/ ? hz i n input noise current f o = 0.1hz to 10hz 5 5 pa p-p input noise current density f o = 10hz 74 74 fa/ ? hz r in input resistance v in = 10v 300 1250 200 1250 g w absolute axi u rati gs w ww u package/order i for atio uu w 1 2 3 4 8 7 6 5 top view r g ?n +in ? s r g +v s output ref n8 package 8-lead pdip s8 package 8-lead plastic so + electrical characteristics
3 lt1168 lt1168ac LT1168C symbol parameter conditions (note 6) min typ max min typ max units gain error g = 1 l 0.01 0.03 0.012 0.04 % g = 10 (note 7) l 0.40 1.5 0.500 1.6 % g = 100 (note 7) l 0.45 1.6 0.550 1.7 % g = 1000 (note 7) l 0.50 1.7 0.600 1.8 % gain nonlinearity v out = 10v, g = 1 l 2 15 3 20 ppm (notes 7, 8) v out = 10v, g = 10 and 100 l 7 30 10 35 ppm v out = 10v, g = 1000 l 25 60 30 80 ppm d g/ d t gain vs temperature g < 1000 (note 7) l 100 200 100 200 ppm/ c lt1168ac/lt1168ai LT1168C/lt1168i symbol parameter conditions (note 6) min typ max min typ max units c in(diff) differential input capacitance f o = 100khz 1.6 1.6 pf c in(cm) common mode input f o = 100khz 1.6 1.6 pf capacitance v cm input voltage range g = 1, other input grounded v s = 2.3v to 5v Cv s + 1.9 +v s C 1.2 Cv s + 1.9 +v s C 1.2 v v s = 5v to 18v Cv s + 1.9 +v s C 1.4 Cv s + 1.9 +v s C 1.4 v cmrr common mode 1k source imbalance, rejection ratio v cm = 0v to 10v g = 1 90 95 85 95 db g = 10 106 115 100 115 db g = 100 120 135 110 135 db g = 1000 126 140 120 140 db psrr power supply v s = 2.3v to 18v rejection ratio g = 1 103 108 100 108 db g = 10 122 128 118 128 db g = 100 131 145 126 145 db g = 1000 135 150 130 150 db i s supply current v s = 2.3v to 18v 350 530 350 530 m a v out output voltage swing r l = 10k v s = 2.3v to 5v Cv s + 1.1 +v s C 1.2 Cv s + 1.1 +v s C 1.2 v v s = 5v to 18v Cv s + 1.2 +v s C 1.3 Cv s + 1.2 +v s C 1.3 v i out output current 20 32 20 32 ma bw bandwidth g = 1 400 400 khz g = 10 200 200 khz g = 100 13 13 khz g = 1000 1 1 khz sr slew rate g = 1, v out = 10v 0.3 0.5 0.3 0.5 v/ m s settling time to 0.01% 10v step g = 1 to 100 30 30 m s g = 1000 200 200 m s refin reference input resistance 60 60 k w i refin reference input current v ref = 0v 18 18 m a v ref reference voltage range Cv s + 1.6 +v s C 1.6 Cv s + 1.6 +v s C 1.6 v a vref reference gain to output 1 0.0001 1 0.0001 t a = 25 c. v s = 15v, v cm = 0v, r l = 10k unless otherwise noted. the l denotes the specifications which apply over the 0 c t a 70 c temperature range. v s = 15v, v cm = 0v, r l = 10k unless otherwise noted. electrical characteristics
4 lt1168 the l denotes the specifications which apply over the 0 c t a 70 c temperature range. v s = 15v, v cm = 0v, r l = 10k unless otherwise noted. the l denotes the specifications which apply over the C 40 c t a 85 c temperature range. v s = 15v, v cm = 0v, r l = 10k unless otherwise noted. (note 8) lt1168ai lt1168i symbol parameter conditions (note 6) min typ max min typ max units gain error g = 1 l 0.014 0.04 0.015 0.05 % g = 10 (note 7) l 0.600 1.9 0.700 2.0 % g = 100 (note 7) l 0.600 2.0 0.700 2.1 % g = 1000 (note 7) l 0.600 2.1 0.700 2.2 % g n gain nonlinearity v o = 10v, g = 1 l 3 20 5 25 ppm (notes 7, 8) v o = 10v, g = 10 and 100 l 10 35 15 40 ppm vo = 10v, g = 1000 l 30 70 35 100 ppm d g/ d t gain vs temperature g < 1000 (note 7) l 100 200 100 200 ppm/ c lt1168ac LT1168C symbol parameter conditions (note 6) min typ max min typ max units v ost total input referred offset voltage v ost = v osi + v oso /g v osi input offset voltage v s = 5v to 15v l 18 60 23 80 m v v osih input offset voltage hysteresis (notes 7, 10) l 3.0 3.0 m v v oso output offset voltage v s = 5v to 15v l 60 380 70 500 m v v osoh output offset voltage hysteresis (notes 7, 10) l 30 30 m v v osi /t input offset drift (rti) (note 9) l 0.05 0.3 0.06 0.4 m v/ c v oso /t output offset drift (note 9) l 0.7 3 0.8 4 m v/ c i os input offset current l 100 400 120 550 pa i os /t input offset current drift l 0.3 0.4 pa/ c i b input bias current l 65 350 105 600 pa i b /t input bias current drift l 1.4 1.4 pa/ c v cm input voltage range g = 1, other input grounded v s = 2.3v to 5v l Cv s + 2.1 +v s C 1.3 Cv s + 2.1 +v s C 1.3 v v s = 5v to 18v l Cv s + 2.1 +v s C 1.4 Cv s + 2.1 +v s C 1.4 v cmrr common mode 1k source imbalance, rejection ratio v cm = 0v to 10v g = 1 l 88 92 83 92 db g = 10 l 100 110 97 110 db g = 100 l 115 120 113 120 db g = 1000 l 117 135 114 135 db psrr power supply v s = 2.3v to 18v rejection ratio g = 1 l 102 115 98 115 db g = 10 l 123 130 118 130 db g = 100 l 127 135 124 135 db g = 1000 l 129 145 126 145 db i s supply current v s = 2.3v to 18v l 390 615 390 615 m a v out output voltage swing r l = 10k v s = 2.3v to 5v l Cv s + 1.4 +v s C 1.3 Cv s + 1.4 +v s C 1.3 v v s = 5v to 18v l Cv s + 1.6 +v s C 1.5 Cv s + 1.6 +v s C 1.5 v i out output current l 16 25 16 25 ma sr slew rate g = 1, v out = 10v l 0.25 0.48 0.25 0.48 v/ m s v ref voltage range (note 9) l Cv s + 1.6 +v s C 1.6 Cv s + 1.6 +v s C 1.6 v electrical characteristics
5 lt1168 note 1: absolute maximum ratings are those values beyond which the life of a device may be imparied. note 2: if the input voltage exceeds the supplies, the input current should be limited to less than 20ma. note 3: a heat sink may be required to keep the junction temperature below absolute maximum. note 4: the lt1168ac/LT1168C are guaranteed functional over the operating temperature range of C 40 c and 85 c. note 5: the lt1168ac/LT1168C are guaranteed to meet specified performance from 0 c to 70 c. the lt1168ac/LT1168C are designed, characterized and expected to meet specified performance from C 40 c to 85 c but are not tested or qa sampled at these temperatures. the lt1168ai/lt1168i are guaranteed to meet specified performance from C40 c to 85 c. note 6: typical parameters are defined as the 60% of the yield parameter distribution. note 7: does not include the tolerance of the external gain resistor r g . note 8: this parameter is measured in a high speed automatic tester that does not measure the thermal effects with longer time constants. the magnitude of these thermal effects are dependent on the package used, heat sinking and air flow conditions. note 9: this parameter is not 100% tested. note 10: hysteresis in offset voltage is created by package stress that differs depending on whether the ic was previously at a higher or lower temperature. offset voltage hysteresis is always measured at 25 c, but the ic is cycled to 85 c i-grade (or 70 c c-grade) or C 40 c i-grade (0 c c-grade) before successive measurement. 60% of the parts will pass the typical limit on the data sheet. the l denotes the specifications which apply over the C 40 c t a 85 c temperature range. v s = 15v, v cm = 0v, r l = 10k unless otherwise noted. (note 5) electrical characteristics lt1168ai lt1168i symbol parameter conditions (note 6) min typ max min typ max units v ost total input referred offset voltage v ost = v osi + v oso /g v osi input offset voltage l 20 75 25 100 m v v osih input offset voltage hysteresis (notes 7, 10) l 3.0 3.0 m v v oso output offset voltage l 180 500 200 600 m v v osoh output offset voltage hysteresis (notes 7, 10) l 30 30 m v v osi /t input offset drift (rti) (note 9) l 0.05 0.3 0.06 0.4 m v/ c v oso /t output offset drift (note 9) l 0.8 5 1 6 m v/ c i os input offset current l 110 550 120 700 pa i os /t input offset current drift l 0.3 0.3 pa/ c i b input bias current l 120 500 220 800 pa i b /t input bias current drift l 1.4 1.4 pa/ c v cm input voltage range v s = 2.3v to 5v l Cv s + 2.1 +v s C 1.3 Cv s + 2.1 +v s C 1.3 v v s = 5v to 18v l Cv s + 2.1 +v s C 1.4 Cv s + 2.1 +v s C 1.4 v cmrr common mode 1k source imbalance, rejection ratio v cm = 0v to 10v g = 1 l 86 90 81 90 db g = 10 l 98 105 95 105 db g = 100 l 114 118 112 118 db g = 1000 l 116 133 112 133 db psrr power supply v s = 2.3v to 18v rejection ratio g = 1 l 100 112 95 112 db g = 10 l 120 125 115 125 db g = 100 l 125 132 120 132 db g = 1000 l 128 140 125 140 db i s supply current l 420 650 420 650 m a v out output voltage swing v s = 2.3v to 5v l Cv s + 1.4 +v s C 1.3 Cv s + 1.4 +v s C 1.3 v v s = 5v to 18v l Cv s + 1.6 +v s C 1.5 Cv s + 1.6 +v s C 1.5 v i out output current l 15 22 15 22 ma sr slew rate l 0.22 0.41 0.22 0.42 v/ m s v ref voltage range (note 9) l Cv s + 1.6 +v s C 1.6 Cv s + 1.6 +v s C 1.6 v
6 lt1168 distribution of input offset voltage distribution of output offset voltage distribution of output offset voltage drift distribution of input offset voltage drift output offset voltage long-term drift typical perfor a ce characteristics uw output offset voltage ( v) 150 0 percent of units (%) 10 20 30 40 60 100 ?0 0 50 1168 g01 100 150 50 5 15 25 35 55 45 v s = 15v t a = 25 c g = 1 299 n8 (2 lots) 337 s0-8 (2 lots) 636 total parts input offset voltage ( v) ?0 0 percent of units (%) 10 20 30 40 60 ?0 ?0 0 20 1168 g02 40 60 50 5 15 25 35 55 45 v s = 15v t a = 25 c g = 1000 299 n8 (2 lots) 337 s0-8 (2 lots) 636 total parts output offset voltage drift ( v/ c) 1.8 0 percent of units (%) 5 15 20 25 35 1168 g03 10 30 1.0 0.2 1.4 0.6 0.2 v s = 15v t a = 40 c to 85 c g = 1 97 n8 (2 lots) 49 s0-8 (1 lot) 146 total parts input offset voltage drift ( v/ c) 0.45 0 percent of units (%) 5 15 20 25 35 1168 g04 10 30 0.25 0.05 0.35 0.15 0.05 97 n8 (2 lots) 49 s0-8 (1 lot) 146 total parts v s = 15v t a = 40 c to 85 c g = 1000 time (months) 0 ?0 change in output offset voltage ( v) ?0 ?0 10 1 2 1168 g05 30 50 ?0 ?0 0 20 40 3 v s = 15v t a = 30 c g = 1 4 parts from 4 lots warmed up input offset voltage long-term drift time (months) 0 ? change in input offset voltage ( v) ? ? 1 1 2 1168 g05 3 5 ? ? 0 2 4 3 v s = 15v t a = 30 c g = 1000 4 parts from 4 lots warmed up warm-up drift gain vs frequency voltage noise density vs frequency time after power-on (minutes) 012345 change in total input referred offset voltage ( v) 1168 g07 35 30 25 20 15 10 5 0 so-8 n-8 v s = 15v t a = 25 c g = 1 frequency (khz) gain (db) 1168 g08 0.01 60 50 40 30 20 10 0 ?0 ?0 1 100 1000 0.1 10 g = 1000 g = 100 g = 10 g = 1 v s = 15v t a = 25 c frequency (hz) 1 10 100 1k 10k 100k 1 voltage noise density (nv/ ? hz) 10 100 1000 1168 g09 v s = 15v t a = 25 c 1/f corner = 2hz gain = 1 gain = 10 gain = 100, 1000 1/f corner = 7hz 1/f corner = 3hz bw limit gain = 1000 bw limit gain = 100
7 lt1168 0.1hz to 10hz noise voltage, g = 1 typical perfor a ce characteristics uw time (sec) 0 noise voltage (2 m v/div) 8 1168 g10 2 4 5 10 6 1 3 9 7 v s = 15v t a = 25 c 0.1hz to 10hz noise voltage, rti g = 1000 time (sec) 0 noise voltage (0.2 m v/div) 8 1168 g11 2 4 5 10 6 1 3 9 7 v s = 15v t a = 25 c frequency (hz) 1 10 current noise density (fa/ ? hz) 100 1000 10 100 1000 1168 g12 v s = 15v t a = 25 c rs 1/f corner = 55hz current noise density vs frequency 0.1hz to 10hz current noise time (sec) 0 noise current (5pa/div) 8 1168 g13 2 4 5 10 6 1 3 9 7 v s = 15v t a = 25 c short-circuit current vs time time from output short to ground (minutes) 0 ?0 (sink) (source) output current (ma) ?0 ?0 ?0 0 50 20 1 2 1168 g14 ?0 30 40 10 3 t a = 40 c v s = 15v t a = 40 c t a = 25 c t a = 85 c t a = 85 c t a = 25 c output impedance vs frequency frequency (hz) 1 output impedance ( w ) 10 100 1k 10k 100k 1m 1168 g15 0.1 1k v s = 15v t a = 25 c g = 1 to 1000 overshoot vs capacitive load input bias current input offset current capacitive load (pf) 10 40 overshoot (%) 50 60 70 80 100 1000 10000 1168 g16 30 20 10 0 90 100 v s = 15v v out = 50mv r l = g = 100, 1000 g = 10 g = 1 input bias current (pa) ?00 output voltage (v) 30 40 50 120 1168 g17 20 10 0 ?20 +i b +i b ? b ?0 40 200 v s 15v t a = 25 c 302 n8 (2 lots) 313 so-8 (2 lots) 615 total parts input offset current (pa) ?20 percent of units (%) 30 40 50 40 1168 g18 20 10 0 ?0 ?0 0 80 120 v s = 15v t a = 25 c 302 n8 (2 lots) 313 so-8 (2 lots) 615 total parts
8 lt1168 change in input bias current for v cm = 20v typical perfor a ce characteristics uw settling time vs step size settling time vs gain change in input bias current (pa) 0 0 percent of units (%) 2 6 8 10 20 14 8 16 20 34 1168 g19 4 16 18 12 412 24 28 32 v s = 15v v cm = 10v t a = 25 c 302 n8 (2 lots) 313 so-8 (2 lots) 615 total parts r incm = 5t r incm = 700g gain 1 1 settling time ( m s) 10 100 1000 10 100 1000 1168 g21 v s = 15v t a = 25 c d v out = 10v to 0.01% settling time (0.1%) vs load capacitance load capacitance (pf) 10 settling time ( s) 34 32 30 28 26 24 22 20 18 16 1168 g22 30 100 300 1000 g = 10, falling edge g = 10, rising edge g = 1, falling edge g = 1, rising edge g = 100, rising edge g = 100, falling edge v s = 15v t a = 25 c r l = 1k step size = 10v falling edge settling time (0.10%) v in (v) 5 m s/div 1168 g24 v out (v) 0 C5 C10 0 C5 C10 0.10 0.05 0.05 0.10 settling (%) 0 input bias and offset current vs temperature temperature ?5 ?0 ?5 0 25 50 75 100 125 input bias and offset current (pa) 1168 g23 500 400 300 200 100 0 100 200 300 400 500 v s = 15v v cm = 0v i os i b t a = 25 c v s = 15v r l = 2k c l = 15pf t = 0 rising edge settling time (0.10%) v in (v) 5 m s/div 1168 g25 v out (v) 10 5 0 10 5 0 0.10 0.05 0.05 0.10 settling (%) 0 t a = 25 c v s = 15v r l = 2k c l = 15pf t = 0 load capacitance (pf) 10 settling time ( s) 36 34 32 30 28 26 24 22 20 18 1168 g26 30 100 300 1000 g = 100, falling edge g = 1, rising edge g = 100, rising edge g = 10, rising edge g = 1, falling edge g = 10, falling edge v s = 15v t a = 25 c r l = 1k step size = 10v frequency (khz) 1 peak-to-peak output swing (v) 10 100 1000 1168 g27 35 30 25 20 15 10 5 0 v s = 15v t a = 25 c g = 10, 100, 1000 g = 1 settling time (0.01%) vs load capacitance undistorted output swing vs frequency settling time ( m s) 8 101214161820222426283032 output step (v) 2 6 10 1168 g20 ? ? 0 4 8 ? ? ?0 0v v out to 0.1% to 0.1% to 0.01% to 0.01% 0v v out v s = 15 g = 1 t a = 25 c c l = 30pf r l = 1k
9 lt1168 output current (ma) (sink) (source) output voltage swing (v) referred to supply voltage +v s ? s ? s + 0.5 ? s + 1.0 ? s + 1.5 ? s + 2.0 ? s + 2.5 +v s ?2.5 +v s ?2.0 +v s ?1.5 +v s ?1.0 +v s ?0.5 0.01 1 10 100 1168 g28 0.1 v s = 15v 85 c 25 c ?0 c large-signal transient response 50 m s/div g = 10 v s = 15v r l = 2k c l = 60pf 5v/div 1168 g33 50 m s/div large-signal transient response g = 1 v s = 15v r l = 2k c l = 60pf 5v/div 1168 g31 small-signal transient response 10 m s/div g = 1 v s = 15v r l = 2k c l = 60pf 20mv/div 1168 g32 output voltage swing vs load current typical perfor a ce characteristics uw temperature ( c) 50 ?5 10 output current (ma) 30 60 0 50 75 1168 g29 20 50 40 25 100 v s = 15v sinking current sourcing current temperature ( c) 50 ?5 0 slew rate (v/ s) 0.4 1.0 0 50 75 1168 g30 0.2 0.8 0.6 25 100 v s = 15v v out = 10v g = 1 +slew slew output short-circuit current vs temperature slew rate vs temperature v out (v) ?5 input voltage range with respect to negative supply (v s + v in ) input voltage range with respect to positive supply (+v s ?v in ) 9 12 15 14 13 10 11 7 8 4 5 1 2 ? 7 1168 g43 6 3 0 ? ? 0 ? ? ? ? ? ? ?1 ?0 ?4 ?3 ? ?2 ?5 ?1 ? 3 11 15 +v cm = +v s ?1.4v ? cm = v s + 1.9v v out = +v s ?1.3v v out = ? s + 1.2v v s = 15v t a = 25 c g = 1 g = 1 g = 100 g = 100 g = 10 g = 2 g = 2 g = 10 input voltage range vs output voltage for various gains
10 lt1168 200 m s/div large-signal transient response g = 1000 v s = 15v r l = 2k c l = 60pf 5v/div 1168 g37 small-signal transient response 200 m s/div g = 1000 v s = 15v r l = 2k c l = 60pf 20mv/div 1168 g38 typical perfor a ce characteristics uw negative power supply rejection ratio vs frequency frequency (hz) 0.1 1 10 100 1k 10k 100k negative powr supply rejection ratio (db) 1168 g39 160 140 120 100 80 60 40 20 0 g = 1000 g = 100 g = 10 g = 1 v s = 15v t a = 25 c positive power supply rejection ratio vs frequency frequency (hz) 0.1 1 10 100 1k 10k 100k positive powr supply rejection ratio (db) 1168 g40 160 140 120 100 80 60 40 20 0 g = 1000 g = 100 g = 10 g = 1 v s = 15v t a = 25 c frequency (hz) 0.1 1 10 100 1k 10k 100k common mode rejection ratio (db) 1168 g41 160 140 120 100 80 60 40 20 0 g = 1000 g = 100 g = 10 g = 1 v s = 15v t a = 25 c 1k source imbalance temperature ( c) 50 ?5 0.1 supply current (ma) 0.3 0.6 0 50 75 1168 g42 0.2 0.5 0.4 25 100 125 v s = 15v common mode rejection ratio vs frequency (1k source imbalance) supply current vs temperature large-signal transient response 50 m s/div g = 100 v s = 15v r l = 2k c l = 60pf 5v/div 1168 g35 small-signal transient response 10 m s/div g = 100 v s = 15v r l = 2k c l = 60pf 20mv/div 1168 g36 20mv/div small-signal transient response 10 m s/div g = 10 v s = 15v r l = 2k c l = 60pf 1168 g34
11 lt1168 block diagra w q1 r g 2 output 6 ref 1168 f01 5 7 + a1 + a3 vb r1 24.7k r3 400 w r4 400 w c1 1 r g 8 r7 30k r8 30k r5 30k r6 30k difference amplifier stage preamp stage +in ?n 3 + a2 vb r2 24.7k c2 +v s ? s ? s +v s ? s q2 ? s +v s 4 ? s figure 1. block diagram the lt1168 is a modified version of the three op amp instrumentation amplifier. laser trimming and monolithic construction allow tight matching and tracking of circuit parameters over the specified temperature range. refer to the block diagram (figure 1) to understand the following circuit description. the collector currents in q1 and q2 are trimmed to minimize offset voltage drift, thus assuring a high level of performance. r1 and r2 are trimmed to an absolute value of 24.7k to assure that the gain can be set accurately (0.6% at g = 100) with only one external resistor r g . the value of r g in parallel with r1 (r2) determines the transconductance of the preamp stage. as r g is reduced for larger programmed gains, the transcon- ductance of the input preamp stage increases to that of the input transistors q1 and q2. this increases the open-loop gain when the programmed gain is increased, reducing the input referred gain related errors and noise. the input voltage noise at gains greater than 50 is determined only by q1 and q2. at lower gains the noise of the difference amplifier and preamp gain setting resistors increase the noise. the gain bandwidth product is determined by c1, c2 and the preamp transconductance which increases with programmed gain. therefore, the bandwidth does not drop proportionally with gain. the input transistors q1 and q2 offer excellent matching, which is inherent in npn bipolar transistors, as well as picoampere input bias current due to superbeta process- ing. the collector currents in q1 and q2 are held constant due to the feedback through the q1-a1-r1 loop and q2-a2-r2 loop which in turn impresses the differential input voltage across the external gain set resistor r g . since the current that flows through r g also flows through r1 and r2, the ratios provide a gained-up differential theory of operatio u
12 lt1168 voltage, g = (r1 + r2)/r g , to the unity-gain difference amplifier a3. the common mode voltage is removed by a3, resulting in a single-ended output voltage referenced to the voltage on the ref pin. the resulting gain equation is: g = (49.4k w /r g ) + 1 solving for the gain set resistor gives: r g = 49.4k w /(g C 1) table 1 shows appropriate 1% resistor values for a variety of gains. table 1 desired gain r g closest 1% value resultant gain 1 open open 1 2 49400 w 49900 w 1.99 5 12350 w 12400 w 4.984 10 5488.89 w 5490 w 9.998 20 2600 w 2610 w 19.93 50 1008.16 w 1000 w 50.4 100 498.99 w 499 w 99.998 200 248.24 w 249 w 199.4 500 99 w 100 w 495 1000 49.95 w 49.4 w 1001 input and output offset voltage the offset voltage of the lt1168 has two components: the output offset and the input offset. the total offset voltage referred to the input (rti) is found by dividing the output offset by the programmed gain (g) and adding it to the input offset. at high gains the input offset voltage domi- nates, whereas at low gains the output offset voltage dominates. the total offset voltage is: total input offset voltage (rti) = input offset + (output offset/g) total output offset voltage (rto) = (input offset ? g) + output offset reference terminal the reference terminal is one end of one of the four 30k resistors around the difference amplifier. the output voltage of the lt1168 (pin 6) is referenced to the voltage on the reference terminal (pin 5). resistance in series with the ref pin must be minimized for best common mode rejection. for example, a 6 w resistance from the ref pin to ground will not only increase the gain error by 0.02% but will lower the cmrr to 80db. input voltage range the input voltage range for the lt1168 is specified in the data sheet at 1.4v below the positive supply to 1.9v above the negative supply for a gain of one. as the gain increases the input voltage range decreases. this is due to the ir drop across the internal gain resistors r1 and r2 in figure 1. for the unity gain condition there is no ir drop across the gain resistors r1 and r2, the output of the gm amplifiers is just the differential input voltage at pin 2 and pin 3 (level shifted by one v be from q1 and q2). when a gain resistor is connected across pins 1 and 8, the output swing of the gm cells is now the differential input voltage (level shifted by v be ) plus the differential voltage times the gain (ratio of the internal gain resistors to the external gain resistor across pins 1 and 8). to calculate how close to the positive rail the input (v in ) can swing for a gain of 2 and a maximum expected output swing of 10v, use the following equation: +v s C v in = C 0.5 C (v out /g) ? (g C 1)/2 substituting yields: C 0.5 C (10/2) ? (1/2) = C 3v below the positive supply or 12v for a 15v supply. to calculate how far above the negative supply the input can swing for a gain of 10 with a maximum expected output swing of C10v, the equation for the negative case is: Cv s + v in = 1.5 C (v out /g) ? (g C 1)/2 substituting yields: 1.5 C (C10/10) ? 9/2 = 6v above the negative supply or C 9v for a negative supply voltage of C15v. figures 2 and 3 are for the positive common mode and negative common mode cases respectively. theory of operatio u
13 lt1168 single supply operation for best results under single supply operation, the ref pin should be raised above the negative supply (pin 4) and one of the inputs should be at least 2.5v above ground. the barometer application later in this data sheet is an example that satisfies these conditions. the resistance r set from the bridge transducer to ground sets the operating current for the bridge, and with r6, also has the effect of raising the input common mode voltage. the output of the lt1168 is always inside the specified range since the barometric pressure rarely goes low enough to cause the output to clip (30.00 inches of hg corresponds to 3.000v). for applica- tions that require the output to swing at or below the ref v out (v) 0 input voltage with respect to positive supply (+v s ?v in )(v) ? 6 1168 f02 ? ? 24 8 ? ? +v s ? ? ? 10 12 14 g = 2 area of operation t a = 25 c input common mode range is below the curve g = 100 area of operation g = 1 area of operation g = 10 area of operation figure 2. positive input range vs output voltage for different gains v out (v) ?4 ? s 1 3 4 5 ? ? ? 9 1168 f03 2 ?0 8 ?2 0 6 7 8 input voltage range with respect to negative supply (v s + v in )(v) t a = 25 c input common mode range is above the curve g = 2 area of operation g = 100 area of operation g = 10 area of operation g = 1 area of operation figure 4. optional trimming of output offset voltage figure 3. negative input voltage range vs output voltage for various gains potential, the voltage on the ref pin can be further level shifted. the application in the front of this data sheet, single supply pressure monitor, is an example. an op amp is used to buffer the voltage on the ref pin since a parasitic series resistance will degrade the cmrr. output offset trimming the lt1168 is laser trimmed for low offset voltage so that no external offset trimming is required for most applica- tions. in the event that the offset needs to be adjusted, the circuit in figure 4 is an example of an optional offset adjust circuit. the op amp buffer provides a low impedance to the ref pin where resistance must be kept to minimum for best cmrr and lowest gain error. + 2 ?n output +in 1 8 10k 100 100 ?0mv 1168 f04 ? s +v s 10mv 5 6 1/2 lt1112 10mv adjustment range r g 3 + lt1168 ref input bias current return path the low input bias current of the lt1168 (250pa) and the high input impedance (200g w ) allow the use of high impedance sources without introducing additional offset voltage errors, even when the full common mode range is required. however, a path must be provided for the input bias currents of both inputs when a purely differential signal is being amplified. without this path the inputs will float to either rail and exceed the input common mode range of the lt1168, resulting in a saturated input stage. figure 5 shows three examples of an input bias current theory of operatio u
14 lt1168 the lt1168 is a low power precision instrumentation amplifier that requires only one external resistor to accu- rately set the gain anywhere from 1 to 1000. the lt1168 is trimmed for critical dc parameters such as gain error (0.04%, g = 10), input offset voltage (40 m v, rti), cmrr (90db min, g = 1) and psrr (103db min, g = 1). these trims allow the amplifier to achieve very high dc accuracy. the lt1168 achieves low input bias current of just 250pa (max) through the use of superbeta processing. the output can handle capacitive loads up to 1000pf in any gain configuration and the inputs are protected against esd strikes up to 13kv (human body). input protection the lt1168 can safely handle up to 20ma of input current in an overload condition. adding an external 5k input resistor in series with each input allows dc input fault voltage up to 100v and improves the esd immunity to 8kv (contact) and 15kv (air discharge), which is the iec 1000-4-2 level 4 specification. if lower value input resistors must be used, a clamp diode from the positive supply to each input will maintain the iec 1000-4-2 specification to level 4 for both air and contact discharge. a 2n4393 drain/source to gate is a good low leakage diode for use with resistors between 1k and 20k, see figure 6. the input resistors should be carbon and not metal film or carbon film in order to withstand the fault conditions. path. the first example is of a purely differential signal source with a 10k w input current path to ground. since the impedance of the signal source is low, only one resistor is needed. two matching resistors are needed for higher impedance signal sources as shown in the second example. balancing the input impedance improves both common mode rejection and dc offset. figure 5. providing an input common mode current path 10k 1168 f05 thermocouple 200k microphone, hydrophone, etc 200k center-tap provides bias current return + lt1168 + lt1168 + lt1168 figure 6. input protection applicatio s i for atio wu uu ? s 1168 f06 +v s j2 2n4393 j1 2n4393 out optional for r in < 20k r g r in r in + lt1168 ref rfi reduction in many industrial and data acquisition applications, instrumentation amplifiers are used to accurately amplify small signals in the presence of large common mode theory of operatio u
15 lt1168 voltages or high levels of noise. typically, the sources of these very small signals (on the order of microvolts or millivolts) are sensors that can be a significant distance from the signal conditioning circuit. although these sen- sors may be connected to signal conditioning circuitry, using shielded or unshielded twisted-pair cabling, the ca- bling may act as antennae, conveying very high frequency interference directly into the input stage of the lt1168. the amplitude and frequency of the interference can have an adverse effect on an instrumentation amplifiers input stage by causing an unwanted dc shift in the amplifiers input offset voltage. this well known effect is called rfi rectification and is produced when out-of-band interfer- ence is coupled (inductively, capacitively or via radiation) and rectified by the instrumentation amplifiers input tran- sistors. these transistors act as high frequency signal detectors, in the same way diodes were used as rf envelope detectors in early radio designs. regardless of the type of interference or the method by which it is coupled into the circuit, an out-of-band error signal ap- pears in series with the instrumentation amplifiers inputs. to significantly reduce the effect of these out-of-band signals on the input offset voltage of instrumentation amplifiers, simple lowpass filters can be used at the inputs. this filter should be located very close to the input pins of the circuit. an effective filter configuration is illustrated in figure 7, where three capacitors have been added to the inputs of the lt1168. capacitors c xcm1 and c xcm2 form lowpass filters with the external series resis- tors r s1, 2 to any out-of-band signal appearing on each of the input traces. capacitor c xd forms a filter to reduce any unwanted signal that would appear across the input traces. an added benefit to using c xd is that the circuits ac common mode rejection is not degraded due to common mode capacitive imbalance. the differential mode and common mode time constants associated with the capaci- tors are: t dm(lpf) = (r s1 + r s2 )(c xd + c xcm1 + c xcm2 ) t cm(lpf) = (r s1 || r s2 )(c xcm1 + c xcm2 ) setting the time constants requires a knowledge of the frequency, or frequencies of the interference. once this frequency is known, the common mode time constants can be set followed by the differential mode time constant. to avoid any possibility of inadvertently affecting the signal to be processed, set the common mode time constant an order of magnitude (or more) smaller than the differential mode time constant. set the common mode time constants such that they do not degrade the lt1168 inherent ac cmr. then the differential mode time con- stant can be set for the bandwidth required for the appli- cation. setting the differential mode time constant close to the sensors bw also minimizes any noise pickup along the leads. to avoid any possibility of common mode to differential mode signal conversion, match the common mode time constants to 1% or better. if the sensor is an rtd or a resistive strain gauge and is in proximity to the instrumentation amplifier, then the series resistors r s1, 2 can be omitted. figure 7. adding a simple rc filter at the inputs to an instrumentation amplifier is effective in reducing rectification of high frequency out-of-band signals applicatio s i for atio wu uu ? s +v s in + in 1168 f07 v out r g c xcm1 0.001 f c xcm2 0.001 f c xd 0.1 f r s1 1.6k r s2 1.6k external rfi filter + lt1168 f 3db 500hz nerve impulse amplifier the lt1168s low current noise makes it ideal for emg monitors that have high source impedances. demonstrat- ing the lt1168s ability to amplify low level signals, the circuit in figure 8 takes advantage of the amplifiers high gain and low noise operation. this circuit amplifies the low level nerve impulse signals received from a patient at pins 2 and 3. r g and the parallel combination of r3 and r4 set a gain of ten. the potential on lt1112s pin 1 creates
16 lt1168 a ground for the common mode signal. c1 was chosen to maintain the stability of the patient ground. the lt1168s high cmrr ensures that the desired differential signal is amplified and unwanted common mode signals are at- tenuated. since the dc portion of the signal is not impor- tant, r6 and c2 make up a 0.3hz highpass filter. the ac signal at lt1112s pin 5 is amplified by a gain of 101 set by r7/r8 +1. the parallel combination of c3 and r7 form a lowpass filter that decreases this gain at frequencies above 1khz. the ability to operate at 3v on 350 m a of supply current makes the lt1168 ideal for battery-pow- ered applications. total supply current for this application is 1.05ma. proper safeguards, such as isolation, must be added to this circuit to protect the patient from possible harm. low i b favors high impedance bridges, lowers dissipation the lt1168s low supply current, low supply voltage operation and low input bias currents allow it to fit nicely into battery-powered applications. low overall power dissipation necessitates using higher impedance bridges. the single supply pressure monitor application on the front of this data sheet, shows the lt1168 connected to the differential output of a 3.5k bridge. the picoampere input bias currents keep the error caused by offset current to a negligible level. the lt1112 level shifts the lt1168s reference pin and the adcs analog ground pins above ground. the lt1168s and lt1112s combined power dissipation is still less than the bridges. this circuits total supply current is just 2.2ma. figure 8. nerve impulse amplifier applicatio s i for atio wu uu 2 2 ?n patient gnd output 1v/mv +in 1 1 8 r6 1m r7 10k r8 100 1168 f08 a v = 101 pole at 1khz 5 5 4 ?v ?v 3v 3v 7 6 8 4 7 6 + 1/2 lt1112 1/2 lt1112 r4 30k r3 30k r1 12k c1 0.01 m f r g 6k 3 3 r2 1m c2 0.47 f 0.3hz highpass c3 15nf patient/circuit protection/isolation + lt1168 g = 10 + figure 9. precision temperature without precision resistors 1168 f09 15v 15v 15v 6 49.4k r t v out = 1.25 7 3 8 1 2 4 22k lt1634-1.25 precision thermistor 5 r t + lt1168 ref figure 10. response of figure 9 for various thermistors temperature ( c) ?0 output voltage (v) 8 10 12 80 100 1168 f10 6 4 0 20 20 40 60 120 2 0 14 ysi #44006 ysi #44011 thermometrics dc95f103w thermo metrics dc95g104z
17 lt1168 single supply barometer typical applicatio s u + + + 2 1 1 1 2 1 r5 200k r4 50k r3 50k r8 100k r6 1k lt1634ccz-1.25 8 4 1/2 lt1490 3 r set 0.6% accuracy at 25 c 1.7% accuracy at 0 c to 60 c v s = 8v to 30v 5k 5k 5k 5k v s 5 4 3 2 + 7 1/2 lt1490 5 6 2 8 lucas nova senor npc-1220-015-a-3l 7 v s 6 1168 ta03 5 to 4-digit dvm 4 r2 12 lt1168 g = 60 r1 825 3 6 r7 50k volts 2.800 3.000 3.200 inches hg 28.00 30.00 32.00 2 ?n output +in 1 8 r1 1m 1168 ta02 2 3 5 6 6 c1 0.1 f + lt1677 r g 3 f 3db = 1 (2 )(r1)(c1) = 1.59hz + lt1168 ref ac coupled instrumentation amplifier
18 lt1168 4-digit pressure sensor typical applicatio s u + + 2 1 1 1 2 1 r8 392k lt1634ccz-1.25 4 11 1/4 lt1114 + 1/4 lt1114 3 5k 5k 5k 5k 9v 9v 5 4 3 2 2 8 lucas nova senor npc-1220-015a-3l 7 6 1168 ta04 5 to 4-digit dvm 4 8 r5 100k r3 51k r4 100k r1 825 r2 12 c1 1 m f r9 1k r set r6 50k r7 180k 3 12 14 13 6 + 1/4 lt1114 10 9 + lt1168 g = 60 0.6% accuracy at room temp 1.7% accuracy at 0 c to 60 c volts 2.800 3.000 3.200 inches hg 28.00 30.00 32.00
19 lt1168 n8 package 8-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) dimensions in inches (millimeters) unless otherwise noted. information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. u package descriptio n8 1098 0.100 (2.54) bsc 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.130 0.005 (3.302 0.127) 0.020 (0.508) min 0.018 0.003 (0.457 0.076) 0.125 (3.175) min 12 3 4 87 6 5 0.255 0.015* (6.477 0.381) 0.400* (10.160) max 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.035 0.015 +0.889 0.381 8.255 () *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm) s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) 0.016 ?0.050 (0.406 ?1.270) 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) so8 1298 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) typ 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) bsc 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * **
20 lt1168 1168f lt/tp 0800 4k ? printed in usa ? linear technology corporation 2000 part number description comments ltc1043 dual precision instrumentation building block switched capacitor, rail-to-rail input, 120db cmrr ltc1100 precision chopper-stabilized instrumentation amplifier g = 10 or 100, v os = 10 m v, i b = 50pa lt1101 precision, micropower, single supply instrumentation amplifier g = 10 or 100, i s = 105 m a lt1102 high speed, jfet instrumentation amplifier g = 10 or 100, slew rate = 30v/ m s lt1167 single resistor programmable precision instrumentation amplifier lower noise than lt1168, e n = 7.5nv/ ? hz linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com low power programmable audio hpf/lpf with pop-less switching typical applicatio u + ltc 201 314 215 116 12 13 89 p 1 r3 8k p 2 4 +15v nc ?5v 4 8 1 ?5v total supply current < 400 a +15v v in 3 2 5 611 c1 100 f 2 3 710 4 5 7 ?5v 1168 ta05 +15v 6 5 6 7 hpf lpf + 1 8 gain set r2 4k r1 4k lt1168 p 1 0 1 0 < 0.8v p 2 0 1 1 1 > 2.4v pole 100 200 400 hz + 1/2 lt1462 1/2 lt1462 related parts

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